Real World PlantUML
offblinkingblink_onenter/turn_led_onexit/turn_led_offblink_off[1.5s][0.75s]turn_on_offturn_on_off
STATE DIAGRAM
5206065687822336
HTTP Request Parsing StatesRequestLineParse HTTPrequest lineHeadersParse HTTPheadersErrorHostCheck hostheader is presentLengthCheck if required,valid & sizeChunkedParse HTTPchunk headerOkFailureOkFailureNot chunkedChunkedFailureFailureEntity Too LargeOkFailureOk
STATE DIAGRAM
5270249679093760
State flow - process requestInQueuerequest is in queueCanceledrequest is canceledInProcessrequest is in processCompletedprocess has been completed successfullyFailedprocess has been completed with errorssubmit requestcancel requeststart processend process(successfully)end process(with errors)
STATE DIAGRAM
5362931583680512
Move UnitsUnits are movedUnit is movedEnd of Movement PhaseUser11. selectUnit()2. moveUnit()3. endPhase()
STATE DIAGRAM
5503571629965312
RequirementDesignDevelopmentVerificationPreviewDeployOperation
STATE DIAGRAM
5625728552927232
DesignRequirementMRDPRDFeasibility_Report
STATE DIAGRAM
5658860467519488
VerificationDeployPreviewPreview_DemoPreview_LUTPreview_Summary
STATE DIAGRAM
5675421861412864
State1State2
STATE DIAGRAM
5764017373052928
WAIT_SCRIPT_RECEIVEDWAIT_STARTEDFINISHEDSTARTEDWAIT_REPORTrun /send script(not all) script received /null(all) script received /send startexception /send stop(all) started /broadcast buffered events & varsevent, variable /buffer,(not all) started /nullexception /send stopevent, variable /broadcast(all) report /save report,exception /send stop(not all) report /save report(all) report /save report,exception /send stop(not all) report /save reportdone!
STATE DIAGRAM
5785046606675968
VerificationDeployPreviewPreview_DemoPreview_LUTPreview_Summary
STATE DIAGRAM
5796718448738304
IDLEWAIT_STARTSTARTEDFINISHEDreceive SEND SCRIPT /send SCRIPT RECEIVEDreceive START /send STARTEDreceive STOP /send REPORTexception /send EXCEPTIOMtrigger event, set variable /send EVENT or VARIABLE,receive EVENT or VARIABLE/save event or variablescript end / send REPORTreceive STOP / send REPORTexception / send EXCEPTION
STATE DIAGRAM
5833199632515072
Select a serverServer processingBuildinit object and startbackground procSelectfind proper serverAwaitwait for server selectto have at least amaster serverReceivereceive serverobjects from channelUriClient Objectserverserver objectDiscoverloop throughlist of serversCatagorizecatagorize listof serversSendsend each serverobject through channelTopologyset server types andClient topologyInterrogateask server for secondary hostsserver from urilist of serverslist of serverslist of serversmaster serverfound servers
STATE DIAGRAM
5839127761125376
NotShootingIdleProcessingConfiguringNewValueSelectionNewValuePreviewState1State2EvNewValueEvNewValueRejectedEvNewValueSavedSignalEventFinishEvConfigEvConfig
STATE DIAGRAM
5962937306972160
DeployOperationOperation_LaunchOperation_Auto_MonitorOperation_BizData_CollectionOperation_BizData_AnylasisOperation_Next_Preparation
STATE DIAGRAM
5992081210212352
DeployOperationOperation_LaunchOperation_Auto_MonitorOperation_BizData_CollectionOperation_BizData_AnylasisOperation_Next_Preparation
STATE DIAGRAM
6015658701619200
DesignVerificationDevelopmentProject_KickOff_MeetingSprint_PlanningSprint_DevelopmentSprint_Funtion_TestSprint_DemoSprint_ReviewBug_FixingProject_Release
STATE DIAGRAM
6025229230931968
HTTP Response Parsing StatesResponseLineParse HTTPresponse lineHeadersParse HTTPheadersErrorLengthIf presentcheck validChunkedParse HTTPchunk headerOkFailureNot chunkedChunkedFailureFailureOkFailureOk
STATE DIAGRAM
6038809917521920
RequirementDevelopmentDesignBluePrint_DesignCoreVisual_DesignArchitecture_DesignModule_Interface_DesignTestCase_Design
STATE DIAGRAM
6042219316248576
DesignRequirementMRDPRDFeasibility_Report
STATE DIAGRAM
6102375970373632
DesignVerificationDevelopmentProject_KickOff_MeetingSprint_PlanningSprint_DevelopmentSprint_Funtion_TestSprint_DemoSprint_ReviewBug_FixingProject_Release
STATE DIAGRAM
6255155473285120
RequirementDevelopmentDesignBluePrint_DesignCoreVisual_DesignArchitecture_DesignModule_Interface_DesignTestCase_Design
STATE DIAGRAM
6257929216851968